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Hardware Implementation of Secured Socket Communication based on Chaotic Cryptosystem

Abstract : Over the last decades, Field Programmable Gate Array (FPGA) boards have seen their use widely spread in different research topics. This can be explained by their low power consumption, their ability of enhancing the performances, and the several functions that can be included in those circuits. One major function delivered by FPGA boards is to be reconfigurable which helps during the development and validation stages, since it is always possible to correct just the program and to reload it in the circuit. Using these advantages and functions was the main idea of our work. In this paper, we will show how to design and to implement a Pseudorandom-Key-Generator that can be used to secure a socket-based communication. The proposed key-generator, created by solving the Lorenz chaos-system, has the main task of delivering at each opened channel a new 32-bit key that is used for encrypting/decrypting data. The proposed approach is implemented and tested using Xilinx Zync702 Boards.
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https://hal.univ-lorraine.fr/hal-02972299
Contributor : Belqassim Bouteghrine <>
Submitted on : Tuesday, October 20, 2020 - 12:13:04 PM
Last modification on : Tuesday, March 30, 2021 - 4:07:22 PM

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Belqassim Bouteghrine, Mohammed Rabiai, Camel Tanougast, Said Sadoudi. Hardware Implementation of Secured Socket Communication based on Chaotic Cryptosystem. 2019 International Conference on Cyber Security and Protection of Digital Services (Cyber Security), Jun 2019, Oxford, United Kingdom. pp.1-4, ⟨10.1109/CyberSecPODS.2019.8884879⟩. ⟨hal-02972299⟩

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