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Communication Dans Un Congrès Année : 2007

A Design Methodology for Power Electronics Digital Control based on an FPGA in the Loop Prototyping

Résumé

This paper presents a methodology to design and prototype an FPGA-based fully digital controller for power electronics systems. A Top-down methodology is used to study step by step the digital adaptation and implementation of the control algorithm. Finally, an experimental FPGA in the loop prototype is achieved, based on MATLAB/SimPower Systems and Altera DSP Builder mixed simulation tools. Modeling, mixed simulation and FPGA in the loop prototyping are achieved in a unique design environment. An application using the proposed methodology is studied: a fully digital controller for a single- phase parallel active power filter. The controller is described and the control algorithm examined with FPGA in the loop prototyping.
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Dates et versions

hal-03565818 , version 1 (11-02-2022)

Identifiants

Citer

S. Karimi, Philippe Poure, Y. Berviller, S. Saadate. A Design Methodology for Power Electronics Digital Control based on an FPGA in the Loop Prototyping. 2007 14th IEEE International Conference on Electronics, Circuits and Systems (ICECS '07), Dec 2007, Marrakech, Morocco. pp.701-704, ⟨10.1109/ICECS.2007.4511088⟩. ⟨hal-03565818⟩
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