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Theses

Exploration multicritères d'architectures à Reconfiguration Dynamique

Abstract : Days after days, new dynamically reconfigurable circuits provides more flexibility and possibilities to implement various algorithms. If progress is significant with regard to the material, an efficient implementation is hard to define according to this new flexibility. It provides to the developers a vast field of solutions meeting their needs. Today, available reconfigurable circuits from the main FPGA companies do not have efficient methods and tools necessary to a good management these components. The goal of this work is to provide tools allowing a complete exploration of the possibilities offered by dynamic reconfiguration for the implementation of an algorithm. We can thus give to the developers an overview of the performances that such or such manner of splitting its application will achieve. The result is then to allow an faster , simpler and less constraining implementation using the dynamic reconfiguration which still appear complex to a beginner in the world of reconfigurable computing.
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Theses
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http://docnum.univ-lorraine.fr/prive/SCD_T_2004_0195_BRUNET.pdf
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https://hal.univ-lorraine.fr/tel-01746731
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Submitted on : Thursday, March 29, 2018 - 10:43:37 AM
Last modification on : Monday, August 31, 2020 - 10:42:19 AM

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  • HAL Id : tel-01746731, version 1

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Philippe Brunet. Exploration multicritères d'architectures à Reconfiguration Dynamique. Autre. Université Henri Poincaré - Nancy 1, 2004. Français. ⟨NNT : 2004NAN10195⟩. ⟨tel-01746731⟩

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