Réseaux embarqués sur puce reconfigurable dynamiquement et sûrs de fonctionnement

Abstract : The need of performance of embedded Syxtena-on-Chlps (Socs) are increasing constantly to meet the requirements of applications becoming more and more complexes, and new processing architectures and new computing paradigms have emerged. The integration within a single chip of dozens, or hundreds of computing and processing elements has given birth to Mukt1 Pmcesmr Systena-on-Chp (MPSoC) allowing to feature a high level of parallel processing. Nowaday s, the performance of these systems rely on the communication medium between the interconnected processing elements. The problematic of the communication medium to feature a high bandwidth and flexibility is primordial in order to efficiently use the parallel processing capacity of the MPSoC In this context, Network-on-Chlps (NoCs) are developed where the aim is to allow the interconnection of a large number of elements in the same device while maintaining a tradeoff between performance and logical resources. Moreover, the emergence of the partial reconfigurable FPGA technology allows to the MPSoC to adapt their elements during its operation in order to meet the system requirements. Given this increasing complexity of the electronic systems and the shrinking size of the devices, the sensibility of the chip against phenomena generating fault has increased. Thereby, to design efficient and reliable Socs, new error detection and localization techniques must be proposed for the dynamic NoCs where the main difficulty is the identification and the distinction between real errors and adaptive behavior of the NoCs. In this context, we present new mechanisms and architectural solutions allowing to check during the system operation the correctness of dynamic NoCs in order to locate and isolate efficiently the faulty components avoiding a failure of the system
Document type :
Theses
File URL :
http://docnum.univ-lorraine.fr/prive/DDOC_T_2012_0396_KILLIAN.pdf
Complete list of metadatas

https://hal.univ-lorraine.fr/tel-01749960
Contributor : Thèses Ul <>
Submitted on : Thursday, March 29, 2018 - 12:34:33 PM
Last modification on : Monday, April 16, 2018 - 10:41:06 AM

Identifiers

  • HAL Id : tel-01749960, version 1

Collections

Citation

Cédric Killian. Réseaux embarqués sur puce reconfigurable dynamiquement et sûrs de fonctionnement. Autre. Université de Lorraine, 2012. Français. ⟨NNT : 2012LORR0396⟩. ⟨tel-01749960⟩

Share

Metrics

Record views

6