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Genetic algorithms for scheduling in a CPU/FPGA architecture with heterogeneous communication delays

Abstract : In this paper we study a CPU/FPGA heterogeneous architecture scheduling problem (often referred as Multi-Processors System on Chip or MPSoC) with communication delays’ constraints. In this context, we propose two approaches based on genetic algorithms. Their main goal is to run in the MPSoC an application, which is described by a given data flow graph. The aim is to minimize the schedule length (makespan). Computational experiments are conducted to evaluate the proposed algorithms. The obtained results show that the two approaches are often capable of finding optimal or near optimal solutions for the studied problem while improving significantly the running time compared to existing works.
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https://hal.univ-lorraine.fr/hal-02967247
Contributor : Camille Diou <>
Submitted on : Wednesday, October 14, 2020 - 5:53:47 PM
Last modification on : Tuesday, March 30, 2021 - 3:55:51 PM

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Fadel Abdallah, Camel Tanougast, Imed Kacem, Camille Diou, Daniel Singer. Genetic algorithms for scheduling in a CPU/FPGA architecture with heterogeneous communication delays. Computers & Industrial Engineering, Elsevier, 2019, 137, pp.106006. ⟨10.1016/j.cie.2019.106006⟩. ⟨hal-02967247⟩

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