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A new FPGA-based DPLL algorithm to improve SAT solvers

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https://hal.univ-lorraine.fr/hal-03293452
Contributor : Fabrice de Almeida Pereira Monteiro <>
Submitted on : Wednesday, July 21, 2021 - 9:23:35 AM
Last modification on : Thursday, July 22, 2021 - 3:13:14 AM

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Khadija Bousmar, Fabrice Monteiro, Zineb Habbas, Sofiene Dellagi, Abbas Dandache. A new FPGA-based DPLL algorithm to improve SAT solvers. 2015 27th International Conference on Microelectronics (ICM), Dec 2015, Casablanca, France. pp.287-290, ⟨10.1109/ICM.2015.7438045⟩. ⟨hal-03293452⟩

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