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Modélisation 3D d'assemblages flip chip pour la fiabilisation des composants électroniques à haute valeur ajoutée de la famille "More than Moore"

Abstract : Flip chip technology is increasingly prevalent in electronics assembly [threedimensional (3D) system in package] and is mainly used at fine pitch for manufacture of megapixel large focal-plane detector arrays. To estimate the reliability of these assemblies, numerical simulations based on finite-element methods appear to be the cheapest approach. However, very large assemblies contain more than one million solder bumps, and the optimization process of such structures through numerical simulations turns out to be a very time-consuming task. In many applications, the interconnection layer of such flip-chip assemblies consists of solder bumps embedded in epoxy filler. For such configurations, we propose an alternative approach, which consists in replacing this heterogeneous interconnection layer by a homogeneous equivalent material (HEM). A micromechanical model for the estimation of its equivalent thermoelastic properties has been developed. The constitutive law of the HEM obtained was then implemented in finite-element software (Abaqus®). Elastic properties of materials that compose the assembly were found in literature and by using mechanical characterization method especially nano-indentation. Thermomechanical responses of tested assemblies submitted to loads corresponding to manufacturing conditions have been analyzed. The homogenization-localization process allowed estimation of the mean values of stresses and strains in each phase of the interconnection layer. To access more precisely to the stress and strain fields in these phases, two models of structural zoom (model coupling and submodeling), taking into account the real solder bump geometry, have been tested. The local stress and strain fields obtained corroborate the experimentally damage initiation of the solder bumps observed
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Submitted on : Thursday, March 29, 2018 - 1:12:57 PM
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Wiyao Kpobie. Modélisation 3D d'assemblages flip chip pour la fiabilisation des composants électroniques à haute valeur ajoutée de la famille "More than Moore". Autre. Université de Lorraine, 2014. Français. ⟨NNT : 2014LORR0236⟩. ⟨tel-01751249⟩



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